Toggle flip-flops have many uses in CMOS VLSI circuitry. Once a state is imposed on such a flip-flop, that state is stored in the flip-flop so long as the power remains in the flip-flop. When the state of the flip-flop is to be changed, the flip-flop is "toggled" to invert its state.
The flip-flop has two stable states, one of which generally represents a digital "1" and the other of which represents a digital "0". The digital 1 is generally represented by a high voltage VDD (typically 5 volts), and the digital 0 is represented by a low voltage VSS (typically 0 volts or ground).
Flip-flops can be implemented in a number of circuit arrangements. Conventionally, however, such circuits include a large number of components and occupy a relatively large amount of space in the overall device.
The present invention is directed toward providing a small, simple toggle flip-flop circuit for use in circuits employing a clocking scheme having three or more phases.